drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

6653

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

6466

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

6289

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

28916

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

8821

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h

7724

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_7_sh_mask.h

29398

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_8_0_sh_mask.h

19662

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_sh_mask.h

7387

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_sh_mask.h

7814

#define ATC_L2_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L