drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

42

#define DMUB_SR(reg) REG_OFFSET(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

47

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

157

#define DMUB_SR(reg) uint32_t reg;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

160

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

41

#define DMUB_SR(reg) REG_OFFSET(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

46

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c

42

#define DMUB_SR(reg) REG_OFFSET(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c

47

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c

41

#define DMUB_SR(reg) REG_OFFSET(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c

46

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn302.c

41

#define DMUB_SR(reg) REG_OFFSET(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn302.c

46

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn303.c

42

#define DMUB_SR(reg) REG_OFFSET(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn303.c

47

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c

40

#define DMUB_SR(reg) REG_OFFSET_EXP(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c

45

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

158

#define DMUB_SR(reg) uint32_t reg;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

161

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c

48

#define DMUB_SR(reg) REG_OFFSET_EXP(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c

53

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c

48

#define DMUB_SR(reg) REG_OFFSET_EXP(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c

53

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c

48

#define DMUB_SR(reg) REG_OFFSET_EXP(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c

53

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

46

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

49

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

174

#define DMUB_SR(reg) uint32_t reg;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

177

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

44

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

47

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

176

#define DMUB_SR(reg) uint32_t reg;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

179

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c

21

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c

24

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c

21

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c

24

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c

20

#define DMUB_SR(reg) REG_OFFSET_EXP(reg),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c

25

#undef DMUB_SR

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

176

#define DMUB_SR(reg) uint32_t reg;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

179

#undef DMUB_SR