drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

49

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

51

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

53

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

55

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

164

#define DMUB_SF(reg, field) uint8_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

166

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

170

#define DMUB_SF(reg, field) uint32_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

172

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

48

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

50

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

52

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

54

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c

49

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c

51

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c

53

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c

55

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c

48

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c

50

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c

52

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c

54

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn302.c

48

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn302.c

50

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn302.c

52

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn302.c

54

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn303.c

49

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn303.c

51

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn303.c

53

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn303.c

55

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c

47

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c

49

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c

51

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c

53

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

165

#define DMUB_SF(reg, field) uint8_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

167

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

171

#define DMUB_SF(reg, field) uint32_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

173

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c

55

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c

57

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c

59

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c

61

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c

55

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c

57

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c

59

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c

61

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c

55

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c

57

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c

59

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c

61

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

51

#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

53

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

55

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

57

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

181

#define DMUB_SF(reg, field) uint8_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

183

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

187

#define DMUB_SF(reg, field) uint32_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

189

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

49

#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

51

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

53

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

55

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

183

#define DMUB_SF(reg, field) uint8_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

185

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

189

#define DMUB_SF(reg, field) uint32_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

191

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c

26

#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c

28

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c

30

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c

32

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c

26

#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c

28

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c

30

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c

32

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c

27

#define DMUB_SF(reg, field) FD_MASK(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c

29

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c

31

#define DMUB_SF(reg, field) FD_SHIFT(reg, field),

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c

33

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

183

#define DMUB_SF(reg, field) uint8_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

185

#undef DMUB_SF

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

189

#define DMUB_SF(reg, field) uint32_t reg##__##field;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

191

#undef DMUB_SF