DISP_CC_MDSS_PCLK0_CLK_SRC
#define DISP_CC_MDSS_PCLK0_CLK_SRC 14
#define DISP_CC_MDSS_PCLK0_CLK_SRC 25
#define DISP_CC_MDSS_PCLK0_CLK_SRC 32
#define DISP_CC_MDSS_PCLK0_CLK_SRC 66
#define DISP_CC_MDSS_PCLK0_CLK_SRC 16
#define DISP_CC_MDSS_PCLK0_CLK_SRC 22
#define DISP_CC_MDSS_PCLK0_CLK_SRC 24
#define DISP_CC_MDSS_PCLK0_CLK_SRC 37
#define DISP_CC_MDSS_PCLK0_CLK_SRC 37
#define DISP_CC_MDSS_PCLK0_CLK_SRC 37
#define DISP_CC_MDSS_PCLK0_CLK_SRC 76
#define DISP_CC_MDSS_PCLK0_CLK_SRC 74
#define DISP_CC_MDSS_PCLK0_CLK_SRC 30
#define DISP_CC_MDSS_PCLK0_CLK_SRC 25
#define DISP_CC_MDSS_PCLK0_CLK_SRC 16
#define DISP_CC_MDSS_PCLK0_CLK_SRC 15
#define DISP_CC_MDSS_PCLK0_CLK_SRC 14
#define DISP_CC_MDSS_PCLK0_CLK_SRC 66
#define DISP_CC_MDSS_PCLK0_CLK_SRC 67
#define DISP_CC_MDSS_PCLK0_CLK_SRC 67
#define DISP_CC_MDSS_PCLK0_CLK_SRC 71
#define DISP_CC_MDSS_PCLK0_CLK_SRC 64
#define DISP_CC_MDSS_PCLK0_CLK_SRC 14
#define DISP_CC_MDSS_PCLK0_CLK_SRC 25
#define DISP_CC_MDSS_PCLK0_CLK_SRC 32
#define DISP_CC_MDSS_PCLK0_CLK_SRC 66
#define DISP_CC_MDSS_PCLK0_CLK_SRC 16
#define DISP_CC_MDSS_PCLK0_CLK_SRC 22
#define DISP_CC_MDSS_PCLK0_CLK_SRC 24
#define DISP_CC_MDSS_PCLK0_CLK_SRC 37
#define DISP_CC_MDSS_PCLK0_CLK_SRC 37
#define DISP_CC_MDSS_PCLK0_CLK_SRC 37
#define DISP_CC_MDSS_PCLK0_CLK_SRC 76
#define DISP_CC_MDSS_PCLK0_CLK_SRC 74
#define DISP_CC_MDSS_PCLK0_CLK_SRC 30
#define DISP_CC_MDSS_PCLK0_CLK_SRC 25
#define DISP_CC_MDSS_PCLK0_CLK_SRC 16
#define DISP_CC_MDSS_PCLK0_CLK_SRC 15
#define DISP_CC_MDSS_PCLK0_CLK_SRC 14
#define DISP_CC_MDSS_PCLK0_CLK_SRC 66
#define DISP_CC_MDSS_PCLK0_CLK_SRC 67
#define DISP_CC_MDSS_PCLK0_CLK_SRC 67
#define DISP_CC_MDSS_PCLK0_CLK_SRC 71
#define DISP_CC_MDSS_PCLK0_CLK_SRC 64