Symbol: DIDT_TD_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h
43778
#define DIDT_TD_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT 0x16
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
49014
#define DIDT_TD_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT 0x16
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
29380
#define DIDT_TD_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT 0x16
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
30587
#define DIDT_TD_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT 0x16
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
30873
#define DIDT_TD_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT 0x16
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h
687
#define DIDT_TD_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT 0x16