drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

43635

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

48871

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

29258

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

30465

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

30733

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

547

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

18374

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

20616

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

21224

#define DIDT_TD_CTRL2__LONG_TERM_INTERVAL_RATIO__SHIFT 0x1b