drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

43910

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

49146

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

29515

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

30717

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

30951

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

804

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

18413

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x3fff

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

20661

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x3fff

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

21271

#define DIDT_TCP_CTRL2__MAX_POWER_DELTA_MASK 0x3fff