drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

43902

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

49138

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

29504

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

30706

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

31177

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

1084

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

18410

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

20658

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

21268

#define DIDT_TCP_CTRL1__MIN_POWER__SHIFT 0x0