drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

43904

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0x0000FFFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

49140

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0x0000FFFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

29506

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0x0000FFFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

30708

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0x0000FFFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

31179

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0x0000FFFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

1086

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0x0000FFFFL

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

18409

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0xffff

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

20657

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0xffff

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

21267

#define DIDT_TCP_CTRL1__MIN_POWER_MASK 0xffff