drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

43903

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

49139

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

29505

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

30707

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

31178

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

1085

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

18412

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

20660

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

21270

#define DIDT_TCP_CTRL1__MAX_POWER__SHIFT 0x10