Symbol: DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h
43239
#define DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT 0x1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
48479
#define DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT 0x1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
28886
#define DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT 0x1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
30102
#define DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT 0x1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
30437
#define DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT 0x1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h
189
#define DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT 0x1