drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

43106

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

48346

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

28775

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

29991

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

30307

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

59

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x00003FFFL

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

18281

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x3fff

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

20499

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x3fff

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

21103

#define DIDT_SQ_CTRL2__MAX_POWER_DELTA_MASK 0x3fff