drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

43101

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xFFFF0000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

48341

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xFFFF0000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

28767

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xFFFF0000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

29983

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xFFFF0000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

31156

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xFFFF0000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

1063

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xFFFF0000L

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

18279

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xffff0000

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

20497

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xffff0000

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

21101

#define DIDT_SQ_CTRL1__MAX_POWER_MASK 0xffff0000