drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h

1785

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x8000

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h

1735

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x8000

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h

1945

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x8000

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h

2987

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h

2374

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h

984

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h

784

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h

975

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_sh_mask.h

1187

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h

940

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h

765

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h

1164

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_4_sh_mask.h

8624

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h

667

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_sh_mask.h

1714

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h

677

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h

676

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_5_0_sh_mask.h

6740

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_5_1_sh_mask.h

6719

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_6_0_sh_mask.h

1115

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_sh_mask.h

764

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_0_sh_mask.h

11490

#define DCCG_SOFT_RESET__P1PLL_CFG_IF_SOFT_RESET_MASK 0x00008000L