drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

20226

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

18398

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

17289

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

19528

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

13983

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

13189

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h

12954

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

12817

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

14117

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

13982

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

3913

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

16347

#define CP_HQD_PERSISTENT_STATE__EOP_SWITCH_QOS_EN__SHIFT 0x18