Symbol: CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h
28512
#define CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
26818
#define CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h
28015
#define CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h
30538
#define CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h
24053
#define CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h
15389
#define CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h
15222
#define CP_MES_DOORBELL_CONTROL2__DOORBELL_OFFSET_MASK 0x0FFFFFFCL