Symbol: CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h
28505
#define CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
26811
#define CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h
28008
#define CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h
30531
#define CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h
24046
#define CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h
15382
#define CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK 0x0FFFFFFCL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h
15215
#define CP_MES_DOORBELL_CONTROL1__DOORBELL_OFFSET_MASK 0x0FFFFFFCL