drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

20287

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

18459

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

17353

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

19592

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

14047

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

13253

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h

13019

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

12876

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

14176

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

14041

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

3972

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

16406

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

3938

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

4460

#define CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT 0x1