drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

19271

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

17624

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

16795

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

19038

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

13489

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

12797

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h

12543

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

12749

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

14049

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

13914

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

3845

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

16277

#define CP_HQD_GFX_CONTROL__DB_UPDATED_MSG_EN__SHIFT 0xf