drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h

3675

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x20

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

56031

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x00000020L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

33935

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x00000020L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

39859

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x00000020L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h

75295

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x00000020L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_2_0_sh_mask.h

101567

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x00000020L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

44510

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x00000020L

drivers/gpu/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h

3681

#define CPM_CONTROL__TXCLK_LCNT_GATE_ENABLE_MASK 0x00000020L