Symbol: CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK
drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h
91
#define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x00000002L
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
197
#define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h
197
#define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h
223
#define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2