drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h

138

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x00000019

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h

4142

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h

4130

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h

3348

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h

4264

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h

3962

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/thm/thm_13_0_2_sh_mask.h

893

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/thm/thm_14_0_2_sh_mask.h

366

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h

847

#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x19