Symbol: regSDMA0_TLBI_GCR_CNTL_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
159
#define regSDMA0_TLBI_GCR_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
161
#define regSDMA0_TLBI_GCR_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
162
#define regSDMA0_TLBI_GCR_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
147
#define regSDMA0_TLBI_GCR_CNTL_BASE_IDX 0