Symbol: regRLC_PG_ALWAYS_ON_WGP_MASK_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
9911
#define regRLC_PG_ALWAYS_ON_WGP_MASK_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
10513
#define regRLC_PG_ALWAYS_ON_WGP_MASK_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
8582
#define regRLC_PG_ALWAYS_ON_WGP_MASK_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
6411
#define regRLC_PG_ALWAYS_ON_WGP_MASK_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
6229
#define regRLC_PG_ALWAYS_ON_WGP_MASK_BASE_IDX 1