Symbol: regRLC_GPM_TIMER_STAT_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
9823
#define regRLC_GPM_TIMER_STAT_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
10425
#define regRLC_GPM_TIMER_STAT_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
8494
#define regRLC_GPM_TIMER_STAT_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
6325
#define regRLC_GPM_TIMER_STAT_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
6131
#define regRLC_GPM_TIMER_STAT_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
4915
#define regRLC_GPM_TIMER_STAT_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
6425
#define regRLC_GPM_TIMER_STAT_BASE_IDX 1