arch/alpha/include/asm/barrier.h

6

#define rmb() __asm__ __volatile__("mb": : :"memory")

arch/arc/include/asm/barrier.h

27

#define rmb() asm volatile("dmb 1\n" : : : "memory")

arch/arm/include/asm/barrier.h

65

#define rmb() dsb()

arch/arm/include/asm/barrier.h

71

#define rmb() barrier()

arch/loongarch/include/asm/barrier.h

45

#define rmb() c_rsync()

arch/mips/include/asm/barrier.h

19

static inline void rmb(void)

arch/mips/include/asm/barrier.h

23

#define rmb rmb

arch/parisc/include/asm/barrier.h

17

#define rmb() mb()

arch/parisc/include/asm/barrier.h

23

#define rmb() barrier()

arch/sh/include/asm/barrier.h

29

#define rmb() mb()

arch/sparc/include/asm/barrier_64.h

38

#define rmb() __asm__ __volatile__("":::"memory")

arch/x86/include/asm/barrier.h

17

#define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence", \

arch/x86/um/asm/barrier.h

16

#define rmb() alternative("lock addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)

arch/x86/um/asm/barrier.h

22

#define rmb() asm volatile("lfence" : : : "memory")

include/asm-generic/barrier.h

34

#define rmb() do { kcsan_rmb(); __rmb(); } while (0)

include/asm-generic/barrier.h

65

#define rmb() mb()

tools/arch/alpha/include/asm/barrier.h

6

#define rmb() __asm__ __volatile__("mb": : :"memory")

tools/arch/arm/include/asm/barrier.h

10

#define rmb() ((void(*)(void))0xffff0fa0)()

tools/arch/arm64/include/asm/barrier.h

15

#define rmb() asm volatile("dmb ishld" ::: "memory")

tools/arch/mips/include/asm/barrier.h

19

#define rmb() mb()

tools/arch/powerpc/include/asm/barrier.h

27

#define rmb() __asm__ __volatile__ ("sync" : : : "memory")

tools/arch/riscv/include/asm/barrier.h

18

#define rmb() RISCV_FENCE(ir, ir)

tools/arch/s390/include/asm/barrier.h

28

#define rmb() mb()

tools/arch/sh/include/asm/barrier.h

27

#define rmb() mb()

tools/arch/sparc/include/asm/barrier_64.h

40

#define rmb() __asm__ __volatile__("":::"memory")

tools/arch/x86/include/asm/barrier.h

21

#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")

tools/arch/x86/include/asm/barrier.h

25

#define rmb() asm volatile("lfence" ::: "memory")

tools/arch/xtensa/include/asm/barrier.h

15

#define rmb() barrier()

tools/include/asm-generic/barrier.h

32

#define rmb() mb()

tools/perf/arch/x86/tests/amd-ibs-period.c

29

#define rmb() asm volatile("lfence":::"memory")

tools/testing/selftests/powerpc/dscr/dscr.h

37

#define rmb() asm volatile("lwsync":::"memory")