Symbol: regWD_UTCL1_STATUS
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
2066
#define regWD_UTCL1_STATUS 0x0fe4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
2128
#define regWD_UTCL1_STATUS 0x0fe4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
1163
#define regWD_UTCL1_STATUS 0x0fe4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
2220
#define regWD_UTCL1_STATUS 0x0fe4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
2848
#define regWD_UTCL1_STATUS 0x0fe4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
3598
#define regWD_UTCL1_STATUS 0x0244
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
308
#define regWD_UTCL1_STATUS 0x0244