Symbol: regUVD_MPC_SET_MUXB0
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_offset.h
1046
#define regUVD_MPC_SET_MUXB0 0x02d0
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_offset.h
462
#define regUVD_MPC_SET_MUXB0 0x01d8
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h
464
#define regUVD_MPC_SET_MUXB0 0x01d8
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_offset.h
445
#define regUVD_MPC_SET_MUXB0 0x01d8