Symbol: regUVD_MPC_SET_MUX
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_offset.h
1050
#define regUVD_MPC_SET_MUX 0x02d2
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_offset.h
466
#define regUVD_MPC_SET_MUX 0x01da
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h
468
#define regUVD_MPC_SET_MUX 0x01da
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_offset.h
449
#define regUVD_MPC_SET_MUX 0x01da