Symbol: regCP_HQD_SUSPEND_CNTL_STACK_OFFSET_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4717
#define regCP_HQD_SUSPEND_CNTL_STACK_OFFSET_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4941
#define regCP_HQD_SUSPEND_CNTL_STACK_OFFSET_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3690
#define regCP_HQD_SUSPEND_CNTL_STACK_OFFSET_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3957
#define regCP_HQD_SUSPEND_CNTL_STACK_OFFSET_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3901
#define regCP_HQD_SUSPEND_CNTL_STACK_OFFSET_BASE_IDX 0