Symbol: regCP_HQD_SEMA_CMD
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4652
#define regCP_HQD_SEMA_CMD 0x1fc3
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4876
#define regCP_HQD_SEMA_CMD 0x1fc3
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3625
#define regCP_HQD_SEMA_CMD 0x1fc3
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
745
#define regCP_HQD_SEMA_CMD 0x125f
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3334
#define regCP_HQD_SEMA_CMD 0x125f