Symbol: regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4705
#define regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4929
#define regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3678
#define regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3945
#define regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3889
#define regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
798
#define regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3387
#define regCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0