Symbol: regCPF_UTCL1_CNTL_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4111
#define regCPF_UTCL1_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4327
#define regCPF_UTCL1_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3090
#define regCPF_UTCL1_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3453
#define regCPF_UTCL1_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3367
#define regCPF_UTCL1_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
330
#define regCPF_UTCL1_CNTL_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
2781
#define regCPF_UTCL1_CNTL_BASE_IDX 0