Symbol: regSDMA0_QUEUE1_RB_WPTR_HI
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
288
#define regSDMA0_QUEUE1_RB_WPTR_HI 0x00de
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
294
#define regSDMA0_QUEUE1_RB_WPTR_HI 0x00de
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
293
#define regSDMA0_QUEUE1_RB_WPTR_HI 0x00de
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
288
#define regSDMA0_QUEUE1_RB_WPTR_HI 0x00de