Symbol: regSDMA0_QUEUE1_RB_WPTR
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
286
#define regSDMA0_QUEUE1_RB_WPTR 0x00dd
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
292
#define regSDMA0_QUEUE1_RB_WPTR 0x00dd
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
291
#define regSDMA0_QUEUE1_RB_WPTR 0x00dd
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
286
#define regSDMA0_QUEUE1_RB_WPTR 0x00dd