Symbol: regSDMA0_QUEUE1_IB_BASE_LO
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
300
#define regSDMA0_QUEUE1_IB_BASE_LO 0x00e5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
306
#define regSDMA0_QUEUE1_IB_BASE_LO 0x00e5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
305
#define regSDMA0_QUEUE1_IB_BASE_LO 0x00e5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
300
#define regSDMA0_QUEUE1_IB_BASE_LO 0x00e4