Symbol: regSDMA0_QUEUE1_IB_BASE_HI
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
302
#define regSDMA0_QUEUE1_IB_BASE_HI 0x00e6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
308
#define regSDMA0_QUEUE1_IB_BASE_HI 0x00e6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
307
#define regSDMA0_QUEUE1_IB_BASE_HI 0x00e6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
302
#define regSDMA0_QUEUE1_IB_BASE_HI 0x00e5