Symbol: regSDMA0_QUEUE0_RB_WPTR_HI
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
202
#define regSDMA0_QUEUE0_RB_WPTR_HI 0x0086
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
208
#define regSDMA0_QUEUE0_RB_WPTR_HI 0x0086
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
207
#define regSDMA0_QUEUE0_RB_WPTR_HI 0x0086
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
194
#define regSDMA0_QUEUE0_RB_WPTR_HI 0x0086