Symbol: regRLC_SPM_MC_CNTL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
10578
#define regRLC_SPM_MC_CNTL 0x0982
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
11198
#define regRLC_SPM_MC_CNTL 0x0982
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
9009
#define regRLC_SPM_MC_CNTL 0x0982
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
7019
#define regRLC_SPM_MC_CNTL 0x0982
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
6890
#define regRLC_SPM_MC_CNTL 0x0982
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
5046
#define regRLC_SPM_MC_CNTL 0x4c71
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
6560
#define regRLC_SPM_MC_CNTL 0x4c71