Symbol: regRLC_MEM_SLP_CNTL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
10302
#define regRLC_MEM_SLP_CNTL 0x4e00
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
10914
#define regRLC_MEM_SLP_CNTL 0x4e00
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
8953
#define regRLC_MEM_SLP_CNTL 0x4e00
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
6762
#define regRLC_MEM_SLP_CNTL 0x4e00
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
6594
#define regRLC_MEM_SLP_CNTL 0x4e00
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
4894
#define regRLC_MEM_SLP_CNTL 0x4c06
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
6400
#define regRLC_MEM_SLP_CNTL 0x4c06