drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_0_offset.h

225

#define regMP1_SMN_C2PMSG_53 0x0275

drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_2_offset.h

281

#define regMP1_SMN_C2PMSG_53 0x0275

drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_4_offset.h

274

#define regMP1_SMN_C2PMSG_53 0x0275

drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_5_offset.h

227

#define regMP1_SMN_C2PMSG_53 0x0275

drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_6_offset.h

226

#define regMP1_SMN_C2PMSG_53 0x0275

drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_8_offset.h

228

#define regMP1_SMN_C2PMSG_53 0x0275

drivers/gpu/drm/amd/include/asic_reg/mp/mp_14_0_0_offset.h

135

#define regMP1_SMN_C2PMSG_53 0x0275

drivers/gpu/drm/amd/include/asic_reg/mp/mp_14_0_2_offset.h

135

#define regMP1_SMN_C2PMSG_53 0x0075

drivers/gpu/drm/amd/include/asic_reg/mp/mp_15_0_0_offset.h

212

#define regMP1_SMN_C2PMSG_53 0x0075

drivers/gpu/drm/amd/include/asic_reg/mp/mp_15_0_8_offset.h

136

#define regMP1_SMN_C2PMSG_53 0x0075