Symbol: regGC_EA_CPWD_SDP_VCC_RESERVE1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
2628
#define regGC_EA_CPWD_SDP_VCC_RESERVE1 0x17a8
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3274
#define regGC_EA_CPWD_SDP_VCC_RESERVE1 0x17a8