Symbol: regGC_EA_CPWD_SDP_VCC_RESERVE0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
2626
#define regGC_EA_CPWD_SDP_VCC_RESERVE0 0x17a7
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3272
#define regGC_EA_CPWD_SDP_VCC_RESERVE0 0x17a7