Symbol: regCP_PQ_WPTR_POLL_CNTL1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4230
#define regCP_PQ_WPTR_POLL_CNTL1 0x1e24
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4450
#define regCP_PQ_WPTR_POLL_CNTL1 0x1e24
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3203
#define regCP_PQ_WPTR_POLL_CNTL1 0x1e24
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3556
#define regCP_PQ_WPTR_POLL_CNTL1 0x1e24
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3476
#define regCP_PQ_WPTR_POLL_CNTL1 0x1e24
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
477
#define regCP_PQ_WPTR_POLL_CNTL1 0x1084
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
2938
#define regCP_PQ_WPTR_POLL_CNTL1 0x1084