Symbol: regCP_HQD_PQ_WPTR_POLL_ADDR_HI
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4628
#define regCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4852
#define regCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3601
#define regCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3870
#define regCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3814
#define regCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
721
#define regCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3310
#define regCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253