Symbol: regCP_HQD_PQ_WPTR_POLL_ADDR
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4626
#define regCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4850
#define regCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3599
#define regCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3868
#define regCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3812
#define regCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
719
#define regCP_HQD_PQ_WPTR_POLL_ADDR 0x1252
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3308
#define regCP_HQD_PQ_WPTR_POLL_ADDR 0x1252