Symbol: regCP_HQD_PQ_RPTR_REPORT_ADDR_HI
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4624
#define regCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1fb5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4848
#define regCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1fb5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3597
#define regCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1fb5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3866
#define regCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1fb5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3810
#define regCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1fb5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
717
#define regCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1251
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3306
#define regCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1251