Symbol: regCP_HQD_IQ_TIMER
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4642
#define regCP_HQD_IQ_TIMER 0x1fbf
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4866
#define regCP_HQD_IQ_TIMER 0x1fbf
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3615
#define regCP_HQD_IQ_TIMER 0x1fbf
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3884
#define regCP_HQD_IQ_TIMER 0x1fbf
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3828
#define regCP_HQD_IQ_TIMER 0x1fbf
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
735
#define regCP_HQD_IQ_TIMER 0x125b
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3324
#define regCP_HQD_IQ_TIMER 0x125b