Symbol: regCP_HQD_EOP_BASE_ADDR
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4678
#define regCP_HQD_EOP_BASE_ADDR 0x1fce
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4902
#define regCP_HQD_EOP_BASE_ADDR 0x1fce
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3651
#define regCP_HQD_EOP_BASE_ADDR 0x1fce
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3918
#define regCP_HQD_EOP_BASE_ADDR 0x1fce
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3862
#define regCP_HQD_EOP_BASE_ADDR 0x1fce
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
771
#define regCP_HQD_EOP_BASE_ADDR 0x126a
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3360
#define regCP_HQD_EOP_BASE_ADDR 0x126a