Symbol: regCP_GFX_HQD_HQ_CONTROL0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4448
#define regCP_GFX_HQD_HQ_CONTROL0 0x1e99
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4672
#define regCP_GFX_HQD_HQ_CONTROL0 0x1e99
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3421
#define regCP_GFX_HQD_HQ_CONTROL0 0x1e99
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3728
#define regCP_GFX_HQD_HQ_CONTROL0 0x1e99
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3660
#define regCP_GFX_HQD_HQ_CONTROL0 0x1e99